1. Field
Exemplary embodiments of the present invention relate to a system including a multi-chip and a semiconductor package, and more particularly, to improvement of signal characteristics on shared channel in a multi-chip system.
2. Description of the Related Art
Recently, capacities and speeds of semiconductor memories used as memory devices in most electronic systems tend to increase. Various attempts have been made to mount larger capacities of memories with efficient drivability in smaller size of the memories.
In order to improve the degree of integration of memories, a three-dimensional (3D) layout, which stacks a plurality of memory chips, has been adopted instead of a conventional two-dimensional (2D) layout. The 3D layout of memory chips may be a solution to increasing demand for higher degree of integration through larger capacity while reducing size of memories.
A TSV (through-silicon via) scheme as one of the 3D layout technology has been adopted as an alternative for overcoming various concerns in the 3D layout such as reduced transmission speed due to a distance between circuits on a module and a narrow data bandwidth. According to the TSV scheme, paths are defined to pass through a plurality of stacked memory chips and the memory chips communicate with each other through the paths and electrodes formed therein.
FIG. 1 illustrates a diagram illustrating a conventional package including a multi-chip.
Referring to FIG. 1, in the package, a plurality of chips 110 to 140 are stacked and a common channel 101 is formed using TSV through the stacked chips 110 to 140. The plurality of chips 110 to 140 include transmission circuits TX1 to TX4 and reception circuits RX1 to RX4, respectively. The transmission circuits TX1 to TX4 drive output signals or data to the reception circuits RX1 to RX4 through the channel 101. For example, the reception circuit RX1 of the chip 110 may receive a signal driven to the channel 101 by the transmission circuit TX4 of the chip 140, and the reception circuit RX4 of the chip 140 may receive a signal driven to the channel 101 by the transmission circuit TX1 of the chip 110.
The number of chips stacked in the multi-chip package may vary according to a memory design. The length and loading of the channel 101, which are dependent on the number of chips stacked in the multi-chip package, may influence signal characteristics thereon.